The present invention relates generally to serializer/deserializer circuits and, more particularly, to serializer/deserializer circuits operable over a broad frequency range.
Although processing circuitry often processes data in a parallel manner, the data are often communicated between points serially. A serializer circuit is often utilized at a transmission end of a communication link to serialize the data, and a deserializer circuit is often utilized at the reception end to deserialize the data. Bidirectional communication links commonly employ devices that perform both serialization and deserialization, with the device referred to as serializer/deserializer, or more commonly as a serdes.
In some applications, data may be transmitted from one point to another or from one point to any of a number of other points, at different data rates. When the data is transmitted at different data rates, the serdes devices utilized in such a communication link operate at corresponding different frequencies.
Serdes devices commonly include voltage-controlled oscillators, phase detectors, filters, or other circuitry of an analog or quasi-analog nature. These circuits are often tuned for operation at one frequency or a narrow range of frequencies. Accordingly, operating serdes devices over a broad range of frequencies is troublesome, particularly when the maximum frequency is high.